Common CPU Architectures : When you’re diving into embedded systems or general computing, you often hear names like AVR, ARM Cortex-M, RISC-V, x86, or AArch64. These are not just fancy words , they are the backbones of how your devices think and operate.
Let’s break down each architecture, starting from the basics, and understand what makes them unique.
What is a CPU Architecture?
Before jumping into each type, let’s clear one thing — what even is a CPU architecture?
In simple terms, a CPU architecture is like a blueprint for building processors. It defines:
- The instruction set (what operations the CPU can perform)
- How memory and registers are managed
- The data width (8-bit, 16-bit, 32-bit, 64-bit)
- How peripherals and hardware communicate with it
Think of it like the grammar rules of a language. Every architecture has its own “grammar” that software and hardware follow.
AVR Architecture – Great for Getting Started
AVR is an 8-bit microcontroller architecture developed by Atmel (now part of Microchip Technology). It’s the heart of many Arduino boards — perfect for beginners in electronics.
Key Features:
- 8-bit RISC (Reduced Instruction Set Computing)
- Very power-efficient and cheap
- Simple instruction set, easy to learn
- Popular in hobby electronics
Where it’s used:
- Arduino Uno
- Basic robotics
- Small DIY gadgets
Good for:
- Learning embedded systems
- Building small-scale hardware projects
ARM Cortex-M – King of Embedded Systems
ARM (Advanced RISC Machines) doesn’t make chips — it designs architectures that companies like STMicroelectronics, NXP, and TI use to build microcontrollers.
Cortex-M is ARM’s lightweight series made especially for embedded applications.
Key Features:
- 32-bit RISC architecture
- Super low power and high performance
- Widely used in IoT, automotive, medical devices
- Has several series: M0, M3, M4, M7, M33, etc.
Where it’s used:
- STM32 microcontrollers
- Fitbit, Nest, automotive ECUs
- Industrial control systems
Good for:
- Real-time systems
- Projects that need better performance than AVR
- Learning RTOS (Real-Time Operating Systems)
RISC-V – The Open Revolution
RISC-V (pronounced “risk-five”) is a modern, open-source instruction set architecture developed at UC Berkeley.
Unlike ARM or x86, anyone can use RISC-V to design their own CPU — no licensing fee needed. This is a big deal!
Key Features:
- Modular design — use only what you need
- Completely open and free to use
- Growing ecosystem in research and startups
- Can be used for both microcontrollers and powerful processors
Where it’s used:
- SiFive chips
- Kendryte K210 (AI edge devices)
- Educational tools
Good for:
- Learning how CPUs work
- Designing custom hardware
- Supporting open-source hardware movement
x86 – The Veteran of Desktop Computing
x86 is the architecture developed by Intel, and it powers most of our desktops and laptops.
It started as a 16-bit architecture and has evolved into 32-bit and 64-bit versions.
Key Features:
- CISC (Complex Instruction Set Computing)
- Very powerful and capable of multitasking
- Not as power-efficient as RISC-based designs
- Massive software support
Where it’s used:
- Windows/Linux PCs
- Laptops, desktops
- Some servers and industrial machines
Good for:
- Running complex software
- Desktop application development
- Learning low-level system programming
AArch64 – ARM’s 64-bit Powerhouse
AArch64 is the 64-bit version of the ARM architecture, often seen in smartphones, tablets, and even servers. This architecture runs ARMv8-A and newer.
Key Features:
- 64-bit version of ARM (supports more memory and better performance)
- Powers most Android and iOS phones
- Very energy efficient
- Used in Apple M-series chips (with some tweaks)
Where it’s used:
- Smartphones (Snapdragon, MediaTek)
- Raspberry Pi 4 (64-bit OS)
- Apple M1, M2, M3 chips (heavily customized ARM)
Good for:
- Mobile app development
- High-performance embedded systems
- Learning modern computing architecture
Quick Comparison Table:
Architecture | Bit Width | Type | Typical Use | Beginner Friendly? |
---|---|---|---|---|
AVR | 8-bit | RISC | Arduino, DIY electronics | ✅ Yes |
ARM Cortex-M | 32-bit | RISC | IoT, industrial, medical devices | ✅ Yes |
RISC-V | 32/64-bit | RISC | Research, open-source CPUs | ✅ Yes (growing) |
x86 | 32/64-bit | CISC | Desktops, laptops | ❌ Not really |
AArch64 | 64-bit | RISC | Smartphones, tablets, servers | ⚠️ Intermediate |
Compiling code for different architectures ?
Great question, Nish! Compiling code for different architectures requires cross-compilation, which means compiling the code on one machine (host) for a different architecture (target). Let’s break down how to compile code for each of these architectures.
AVR Architecture
For AVR (typically used in Arduino), you’ll use AVR-GCC, which is a cross-compiler that generates code for AVR microcontrollers.
Steps:
- Install AVR-GCC:
- On Ubuntu, you can install it using:
sudo apt-get install avr-gcc avr-libc
- On Ubuntu, you can install it using:
- Write Your Code: Write your C or C++ code for the AVR microcontroller.
- Compile Code: Use the
avr-gcc
tool to compile the code. For example, to compile a filemain.c
for an Arduino (AVR-based):avr-gcc -mmcu=atmega328p -o main.elf main.c
- Generate Hex File: After compiling, you need to generate the hex file to upload it to the AVR device:
avr-objcopy -O ihex main.elf main.hex
- Upload to Arduino: You can use the
avrdude
tool to upload the compiled hex file to your Arduino:avrdude -c arduino -p m328p -P /dev/ttyACM0 -U flash:w:main.hex:i
ARM Cortex-M (Using GCC Toolchain)
For ARM Cortex-M (common in embedded systems), you’ll use the GNU Arm Embedded Toolchain.
Steps:
- Install the Toolchain:
- On Ubuntu, you can install it using:
sudo apt-get install gcc-arm-none-eabi
- On Ubuntu, you can install it using:
- Write Your Code: Write your code for the ARM Cortex-M microcontroller.
- Set Up the Makefile: You’ll need a Makefile for your project, specifying the target architecture (
-mcpu=cortex-m4
for example). A simple example of aMakefile
:TARGET = main MCU = cortex-m4 CC = arm-none-eabi-gcc CFLAGS = -mcpu=$(MCU) -mthumb -nostdlib all: $(TARGET).elf $(TARGET).elf: $(TARGET).c $(CC) $(CFLAGS) -o $(TARGET).elf $(TARGET).c
- Compile the Code: Run
make
to compile the code:make
- Generate the Bin or Hex File: Use
objcopy
to generate a.bin
or.hex
file:arm-none-eabi-objcopy -O binary main.elf main.bin
- Upload to Device: To upload, you’ll typically use a JTAG/SWD programmer, such as OpenOCD, to load the firmware onto the device.
RISC-V Architecture
For RISC-V, you need the RISC-V GCC Toolchain. RISC-V is gaining popularity, so it’s an exciting choice!
Steps:
- Install RISC-V Toolchain: You can download and install the toolchain from SiFive or build it yourself from source:
sudo apt-get install gcc-riscv64-linux-gnu
- Write Your Code: Write your code as usual for a RISC-V target.
- Compile the Code: To compile for a RISC-V target, use the
riscv64-unknown-elf-gcc
:riscv64-unknown-elf-gcc -o main.elf main.c
- Generate Binary or Hex: Convert the
.elf
file to a binary file:riscv64-unknown-elf-objcopy -O binary main.elf main.bin
- Upload to Device: Similar to ARM Cortex-M, uploading to RISC-V requires a JTAG/SWD programmer and appropriate tools (like OpenOCD or custom scripts).
x86 Architecture
For x86, which is commonly used in desktop computing, you use the GCC or Clang toolchain.
Steps:
- Install GCC: Most Linux systems already have GCC installed, but if not, you can install it:
sudo apt-get install build-essential
- Write Your Code: Write code for the x86 architecture, usually in C or C++.
- Compile the Code: To compile for an x86 target, use
gcc
(it’s the same on most systems):gcc -o main main.c
- Generate Binary: The output will already be in an executable format (
main
in this case). - Run on the Device: Simply run the compiled program on an x86 machine:
./main
AArch64 (ARM 64-bit)
For AArch64, which is used in 64-bit ARM devices like smartphones and newer embedded systems, you’ll use the ARM64 GCC toolchain.
Steps:
- Install AArch64 GCC: You’ll need the 64-bit ARM toolchain, which you can install like this:
sudo apt-get install gcc-aarch64-linux-gnu
- Write Your Code: Write the code for ARM 64-bit processors.
- Compile for AArch64: Use
aarch64-linux-gnu-gcc
to compile:aarch64-linux-gnu-gcc -o main main.c
- Generate Binary: If you need to generate a binary, you can convert it:
aarch64-linux-gnu-objcopy -O binary main.elf main.bin
- Upload to Device: Like RISC-V and ARM, upload to AArch64-based devices using tools like OpenOCD, JTAG/SWD, or through specific device flashing tools.
Summary of Tools:
Architecture | Compiler/Toolchain | Command to Compile |
---|---|---|
AVR | avr-gcc | avr-gcc -mmcu=atmega328p |
ARM Cortex-M | arm-none-eabi-gcc | arm-none-eabi-gcc -mcpu=cortex-m4 |
RISC-V | riscv64-unknown-elf-gcc | riscv64-unknown-elf-gcc |
x86 | gcc (or clang) | gcc -o main main.c |
AArch64 | aarch64-linux-gnu-gcc | aarch64-linux-gnu-gcc |
Cross-compiling can seem tricky at first, but it’s all about setting up the right toolchain and making sure you’re compiling for the correct architecture. Each architecture has specific tools that let you tailor the build to the needs of that system.
A toolchain is a set of tools used to build software for a specific target system or platform. In the context of cross-compilation, it typically refers to a collection of tools that allow you to compile code on one machine (host) for a different architecture or platform (target).
To explain this clearly, think of a toolchain as a factory line for building software — you feed in the source code, and the toolchain “produces” the compiled output (like a binary file) that runs on your target machine.
A typical toolchain for building software includes:
- Compiler: The compiler translates the source code (C, C++, etc.) into machine code (binary) for the target platform. For example:
gcc
for compiling C code for x86arm-none-eabi-gcc
for ARM microcontrollersriscv64-unknown-elf-gcc
for RISC-V platforms
- Assembler: Converts assembly language code into machine code. It’s often bundled with the compiler, but it can be an independent tool.
- Linker: Takes the object files (compiled code) and links them together into a single executable. It resolves references between different parts of the code and libraries.
- Debugger: Helps you debug your program, finding and fixing issues in the compiled code. Examples include
gdb
orlldb
. - Libraries: Precompiled functions or routines that your code can use, like standard libraries (
libc
for C programs). These libraries are also specific to the target architecture. - Other Tools:
- Build Systems: These tools automate the compilation process (e.g., Make, CMake, Bazel).
- Object File Utilities: Such as
objcopy
for manipulating binary files andobjdump
for inspecting them.
Why Use a Toolchain?
- Cross-compilation: If you’re writing software for a device or platform that uses a different CPU architecture (like ARM, RISC-V, or embedded systems), you need to use a toolchain that understands how to compile code for that specific architecture.
- Platform-Specific Code: Different architectures have different instruction sets, which means the code must be compiled differently for each one. A toolchain for each target handles this automatically.
- Development Efficiency: A well-configured toolchain streamlines your development, letting you focus on writing code instead of figuring out how to compile it for your target platform.
Follow-up questions you could explore for each of the common CPU architectures:
AVR:
- What are the main differences between the AVR microcontrollers and ARM Cortex-M microcontrollers?
- How does the Harvard architecture in AVR affect memory access compared to the von Neumann architecture?
- Can you explain the significance of the RISC architecture in AVR microcontrollers?
- What are the most common AVR families and their key differences?
- How does AVR handle interrupt processing and how does it compare with other architectures like ARM Cortex-M?
- How do you perform in-system programming on an AVR microcontroller?
ARM Cortex-M:
- What are the different ARM Cortex-M series (M0, M3, M4, M7, M33, etc.), and how do they differ in terms of performance and power consumption?
- Can you explain the concept of ARM’s Thumb mode and how it benefits embedded applications?
- How does ARM Cortex-M handle real-time interrupts, and how does it differ from other architectures like x86?
- How does ARM Cortex-M implement the memory protection unit (MPU), and how is it useful in embedded systems?
- What are ARM’s TrustZone technology and how does it enhance security in Cortex-M based systems?
- What tools are most commonly used for developing ARM Cortex-M software (e.g., Keil, IAR, GCC)?
RISC-V:
- What are the advantages of using RISC-V over traditional architectures like ARM or x86?
- How does RISC-V’s open-source nature impact the development of embedded systems?
- Can you explain the RISC-V instruction set architecture (ISA) and how it differs from ARM and x86?
- What are the main features of the RISC-V privileged architecture and how is it implemented in embedded systems?
- How do RISC-V processors handle memory management and protection?
- What is the ecosystem around RISC-V (tools, libraries, etc.) for embedded systems development?
x86:
- How does the x86 architecture’s backward compatibility impact modern embedded systems?
- What are the main differences between x86-32 (x86) and x86-64 (AArch64)?
- How does x86 handle context switching and multitasking in real-time systems?
- What role does SIMD (Single Instruction, Multiple Data) play in optimizing performance on x86 processors?
- How do you handle low-level device drivers on an x86-based embedded system?
- How do x86 processors handle power management, and how does this compare with ARM-based systems?
AArch64:
- How does AArch64 architecture provide better performance over the older ARMv7-A architecture?
- What is the significance of the AArch64 architecture’s 64-bit registers compared to 32-bit ARM Cortex-M?
- How does AArch64 implement virtual memory and page table management?
- What are the security features in AArch64, such as ARM TrustZone or ARMv8 Security Extensions?
- What are the main use cases for AArch64 in embedded systems and how does it compare to traditional x86 in terms of performance?
- How is the AArch64 toolchain different from ARM’s 32-bit toolchain (e.g., differences in GCC for ARM and AArch64)?
Follow-up questions on architecture and toolchain aspects
AVR Architecture + Toolchain:
- What is the role of the
avr-gcc
compiler when cross-compiling for AVR microcontrollers, and how does it differ from standard GCC used for x86 platforms? - How do you set the correct MCU model (e.g.,
atmega328p
) in your toolchain when compiling for AVR microcontrollers? - What are some common challenges you might face when cross-compiling for AVR, and how can the
avrdude
tool help during deployment? - Why is it necessary to convert the ELF file to a hex file when working with AVR microcontrollers, and what tool is used for this conversion?
ARM Cortex-M Architecture + Toolchain:
- What are the key flags you need to use with
arm-none-eabi-gcc
to compile for an ARM Cortex-M microcontroller, and why are they important? - How does the toolchain for ARM Cortex-M (e.g.,
arm-none-eabi-gcc
) differ from those used for general-purpose CPUs like x86? - In ARM Cortex-M development, how do you use
OpenOCD
or similar tools for debugging and uploading code to the microcontroller? - Can you explain the role of FPU (Floating Point Unit) and how it might affect your toolchain setup when compiling for ARM Cortex-M?
RISC-V Architecture + Toolchain:
- What are the advantages of using RISC-V as an architecture, and what specific toolchain do you need to compile code for RISC-V (e.g.,
riscv64-unknown-elf-gcc
)? - How would you configure a Makefile for cross-compiling C code to a RISC-V target? What specific flags or options would you include?
- How does RISC-V’s open-source nature affect its toolchain, and what are some considerations when using a RISC-V toolchain for custom processors?
- In what scenarios would you use the RISC-V toolchain over other architectures, and what benefits does it offer for embedded development?
x86 Architecture + Toolchain:
- How does cross-compiling for x86 architecture differ from ARM or RISC-V, considering both the toolchain setup and the target platform?
- What options do you need to provide to the GCC toolchain to specify that you are compiling for x86 architecture, and how do you configure it for 64-bit versus 32-bit targets?
- How does compiling and debugging differ between desktop x86 platforms and embedded systems with microcontrollers (e.g., ARM, AVR)?
- What are some common performance optimization techniques you can apply when compiling code for x86 systems, and how does your toolchain support them?
AArch64 Architecture + Toolchain:
- How do you configure the AArch64 toolchain (
aarch64-linux-gnu-gcc
) for compiling code for 64-bit ARM-based systems like smartphones or servers? - What are the key differences between the toolchain used for AArch64 (ARM 64-bit) and ARM Cortex-M, considering factors like performance and compatibility?
- How do you ensure that the code you compile for AArch64 is optimized for mobile devices or servers, and what tools are used for this process?
- How would you debug and deploy code to an AArch64-based device using tools like OpenOCD or JTAG, and how does the toolchain assist in this process?
General Architecture + Toolchain Questions:
- How do you select the correct toolchain when working with different architectures (e.g., ARM vs. x86 vs. RISC-V), and what factors influence this decision?
- What are the common issues you might face when trying to port software between different architectures, and how does the toolchain help in resolving them?
- How do you configure cross-compilation toolchains to ensure that the generated code is optimized for the target architecture’s instruction set?
- Can you describe the process of compiling and linking code for an embedded system, taking into account the architecture, toolchain, and hardware requirements?
You can also Visit other tutorials of Embedded Prep
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Special thanks to @embedded-prep for contributing to this article on Embedded Prep
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